The PCI-Express bus will no longer be a single parallel data bus through which all data is routed at a set rate. Rather, an assembly of serial, point-to-point wired, individually clocked ‘lanes’ each consisting of two pairs of data lines will carry data upstream and downstream. As the technology goes to market, each of these lanes should be capable of a 2.5Gb/s data rate in each direction. The overall sustained transfer rate roughly equals 200MB/s. PCI-Express has been designed with future upgrades in mind, and should see increased results with later enhancements. Where the real performance benefit comes in is when more than one lane is added to a given point-to-point route. Lanes can be stacked together to increase the amount of bandwidth available to specific areas of the I/O system, such as the video card slot, for example. This technology will have a couple of immediate benefits. First of all, the amount of trace routes on any given motherboard will be considerably reduced by the adoption of point-to-point circuitry.